Renesas Electronics is looking for a Staff Physical Design Engineer to lead physical layout design for chiptop, subsystem, or partition level, from synthesis through verification. You will manage a team to achieve tape-out targets and collaborate closely with related groups to meet project schedules. This role contributes directly to our purpose: To Make Our Lives Easier.
What You'll Do
- Perform physical layout design for chiptop, subsystem, or partition level, including Synthesis, Place & Route, and Physical Verification.
- Conduct Static Timing Checks and manage Power design network and Power Verification.
- Collaborate with related teams to finish designs within the defined schedule.
- Manage a team and work together to achieve Tape Out targets.
- Share technical expertise to build up team capability.
What We're Looking For
- At least 6 years of experience in semiconductor design and Physical Layout design.
- Solid knowledge in using EDA tools from Synopsys, Cadence, or Mentor.
- Good written and oral communication in English, along with strong interpersonal skills.
- A strong team-oriented approach and proven ability to build good relationships.
- Excellent problem-solving skills and a commitment to long-term work.
Nice to Have
- Experience in scripting languages such as C-Shell, Perl, Tcl, or Python.
- Previous experience in logic-related design activities.
Technical Stack
- EDA Tools: Synopsys, Cadence, Mentor
- Scripting Languages: C-Shell, Perl, Tcl, Python
Benefits & Compensation
- A flexible and inclusive work environment.
- Employee Resource Groups.
Work Mode
This role offers a hybrid work arrangement with the option to work remotely two days per week.
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination.
