As an IC Design Engineer, you will play a key role in developing the digital architecture of high-speed SerDes intellectual property used in next-generation communication platforms. Your work will span from initial concept through implementation, focusing on the design and refinement of digital blocks within mixed-signal systems.
Key Responsibilities
- Define and implement digital circuitry for transmitters, receivers, equalizers, and clock recovery systems that support high-data-rate communication standards.
- Perform RTL design and simulation using Verilog HDL, with emphasis on performance, jitter reduction, and power optimization.
- Identify and resolve issues related to clock and reset domain crossings, as well as static linting violations during design verification.
- Collaborate with system architects, physical design engineers, and validation teams to ensure seamless integration of SerDes IP into larger SoC environments.
- Ensure robust signal and power integrity across system boundaries through close coordination with cross-functional teams.
- Develop and maintain detailed documentation covering specifications, microarchitectural decisions, and test methodologies.
- Support post-silicon validation and debugging activities to accelerate product bring-up.
Required Qualifications
- Bachelor's degree in Electrical Engineering or related field with 12 years of relevant industry experience.
- Strong expertise in RTL design and Verilog-based coding for complex digital logic.
- Proven background in SerDes or high-speed I/O design, including hands-on experience with system-level integration challenges.
- Solid understanding of mixed-signal design principles and the impact of semiconductor process variations on circuit performance.
- Experience with low-power design methodologies and tools, including UPF for power intent specification.
- Familiarity with synthesis, timing closure, constraint generation, and domain crossing analysis techniques.
- Strong analytical skills for diagnosing and resolving complex issues in digital and mixed-signal IP blocks.
Preferred Qualifications
- Advanced degree in Electrical Engineering or a related discipline.
Technical Environment
Verilog HDL, RTL design, Lint checking, Clock/Reset domain crossing analysis, UPF, logic synthesis, timing closure workflows
