Role Overview
Lead the functional verification of custom application-specific integrated circuits (ASICs) developed for a global satellite communications network capable of delivering up to 6 terabits per second of symmetrical data throughput. This leadership position is responsible for ensuring robust pre-silicon validation, first-pass silicon success, and software readiness at tape-out.
Key Responsibilities
- Lead end-to-end functional verification for complex ASICs, including digital modem SoCs, RF SoCs combining analog/RF and digital components, and predominantly analog designs with embedded digital logic
- Develop and deploy advanced pre-silicon verification methodologies to ensure functional correctness and power-aware validation
- Collaborate with front-end and back-end ASIC teams, systems engineers, and software developers to define verification scope, deliverables, and quality benchmarks
- Build, manage, and mentor a team of verification engineers across simulation, emulation, and prototyping environments
- Establish and maintain EDA tool flows that support modern verification practices within the ASIC development lifecycle
- Define and drive a roadmap for continuous improvement in verification technologies and methodologies
- Support post-silicon debug and chip bring-up activities to accelerate product development
Required Qualifications
- Bachelor’s degree in Electrical Engineering, Computer Science, or a related technical field
- Minimum of 15 years of experience in embedded firmware or ASIC verification
- Strong knowledge of SoC architectures, including CPUs, memory subsystems, DMA controllers, timers, interrupt systems, and on-chip interconnects
- Proven experience with emulation and prototyping workflows
- Hands-on expertise in TLM, UVM, and power-aware verification using UPF
- Direct experience with gate-level verification and timing-critical validation
Preferred Qualifications
- Experience applying transaction-level modeling for system-level verification and analog modeling in RF/AMS contexts
- Background in verifying digital signal processing pipelines and custom logic blocks
- Track record of successfully delivering large-scale ASICs using advanced CMOS process nodes to high-volume production
Technical Environment
Work within a verification stack that includes TLM, UVM, UPF, gate-level simulation, emulation platforms, prototyping systems, EDA tools, and specialized flows for SoC, RF/AMS, and DSP verification.
Benefits
- Comprehensive medical, dental, and vision coverage
- Basic and supplemental life insurance
- Short- and long-term disability protection
- 401(k) plan with company match of up to 5%
- Education Support Program for continued learning
- Generous paid time off—up to four weeks annually based on schedule
- Up to 14 company-paid holidays per year
- Performance-based bonuses tied to individual and organizational outcomes
Work Environment
This role supports a culture grounded in safety, inclusion, collaboration, and technical excellence. The organization values authenticity, diversity, and equal opportunity in building a qualified, high-performing workforce. Employment decisions are made without regard to race, color, religion, sex, national origin, disability, veteran status, or other protected characteristics. Applicants with criminal histories will be considered in accordance with applicable laws.
